Yield Ramp Simulator (YRS) is an advanced semiconductor yield simulator that predicts functional yield, based on design layout and process characterization information. YRS enables designers to identify the manufacturability issues that exist in their layout, before they tape-out their designs for manufacturing. Product engineering and manufacturing interface teams use YRS to identify and prioritize the process sensitivities that exist for a given product, in order to rapidly resolve the issues that are limiting a product's yield.